JOURNAL REPORT 2020
2018 | 2019 | 2020 | 2021

International Journal of Reconfigurable Computing

0.63

Current CiteScore

0.63

Current CiteScore

Total articles submitted to this journal each month during 2020.
Total articles published in this journal each month during 2020.
9.0

Total authors

Total unique authors of published articles in this journal during 2020.
3

Total published articles

Total articles published in this journal during 2020.
122

Days

Average time from submission to acceptance

46

Days

Average time from acceptance to publication

25

Total submitted articles

Total articles submitted to this journal during 2020.
4

Total accepted articles

Total articles accepted for publication in this journal during 2020.

Most Viewed Articles

ArticleViews
Software-Defined Radio FPGA Cores: Building Towards a Domain-Specific Language2,818
A New High Performance Digital FM Modulator and Demodulator for Software Defined Radio and Its FPGA Implementation2,384
Exposing End-to-End Delay in Software-Defined Networking2,323
From FPGA to support cloud to cloud of FPGA : State of the art2,268
Operating System Concepts for Reconfigurable Computing: Review and Survey2,069
FPGA - Based implementation of all digital QPSK carrier recovery loop combining Costas loop and Maximum likelihood frequency estimator1,371
Design of FPGA-Based Accelerator for Convolutional Neural Network under Heterogeneous Computing Framework with OpenCL1,335
A Real-Time-Capable Dynamic Partial Reconfiguration System for an Application-Specific Soft-Core Processor1,204
An FPGA-based quantum computing emulation framework based on serial-parallel architecture1,193
FPGA-based Channel Coding Architectures for 5G Wireless using High-level Synthesis891

Most Viewed Special Issue Articles

ArticleViews
A FPGA-based hardware accelerator for CNNs using on-chip memories only: design and benchmarking with Intel Movidius Neural Compute Stick2,402
vMAGIC - Automatic Code Generation for VHDL1,315
THE COARSE-GRAINED/FINE-GRAINED LOGIC INTERFACE IN FPGAS WITH EMBEDDED FLOATING-POINT ARITHMETIC UNITS1,146
A Hardware Efficient Random Number Generator for Non-Uniform Distributions with Arbitrary Precision986
FPGA Interconnect Topologies Exploration859
Implementation of Ring Oscillators Based Physical Unclonable Functions with Independent Bits in the Response850
Pipeline FFT Architectures Optimized for FPGAs835
Design of a mathematical unit in FPGAs for the implementation of the control of a magnetic levitation system832
Dimension Reduction using Quantum Wavelet Transform on a High-Performance Reconfigurable Computer721
Runtime Scheduling, Allocation and Execution of Real-Time Hardware Tasks onto Xilinx FPGAs Subject to Fault Occurrence711

Key Indexes