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JOURNAL REPORT 2020
2018
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2019
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2020
International Journal of Reconfigurable Computing
0.63
Current CiteScore
0.63
Current CiteScore
Total articles submitted to this journal each month during 2020.
Total articles published in this journal each month during 2020.
9
Total authors
Total unique authors of published articles in this journal during 2020.
3
Total published articles
Total articles published in this journal during 2020.
122
Days
Average time from submission to acceptance
46
Days
Average time from acceptance to publication
25
Total submitted articles
Total articles submitted to this journal during 2020.
4
Total accepted articles
Total articles accepted for publication in this journal during 2020.
Most Viewed Articles
Article
Views
Software-Defined Radio FPGA Cores: Building Towards a Domain-Specific Language
1,799
A New High Performance Digital FM Modulator and Demodulator for Software Defined Radio and Its FPGA Implementation
1,570
From FPGA to support cloud to cloud of FPGA : State of the art
1,555
Exposing End-to-End Delay in Software-Defined Networking
1,426
Operating System Concepts for Reconfigurable Computing: Review and Survey
1,420
Design of FPGA-Based Accelerator for Convolutional Neural Network under Heterogeneous Computing Framework with OpenCL
1,001
FPGA - Based implementation of all digital QPSK carrier recovery loop combining Costas loop and Maximum likelihood frequency estimator
959
An FPGA-based quantum computing emulation framework based on serial-parallel architecture
920
A Real-Time-Capable Dynamic Partial Reconfiguration System for an Application-Specific Soft-Core Processor
877
Algorithm and Architecture Optimization for 2D Discrete Fourier Transforms with Simultaneous Edge Artifact Removal
647
Most Viewed Special Issue Articles
Article
Views
A FPGA-based hardware accelerator for CNNs using on-chip memories only: design and benchmarking with Intel Movidius Neural Compute Stick
1,702
vMAGIC - Automatic Code Generation for VHDL
904
THE COARSE-GRAINED/FINE-GRAINED LOGIC INTERFACE IN FPGAS WITH EMBEDDED FLOATING-POINT ARITHMETIC UNITS
815
A Hardware Efficient Random Number Generator for Non-Uniform Distributions with Arbitrary Precision
682
Implementation of Ring Oscillators Based Physical Unclonable Functions with Independent Bits in the Response
640
Design of a mathematical unit in FPGAs for the implementation of the control of a magnetic levitation system
617
FPGA Interconnect Topologies Exploration
600
Pipeline FFT Architectures Optimized for FPGAs
585
Dimension Reduction using Quantum Wavelet Transform on a High-Performance Reconfigurable Computer
567
Runtime Scheduling, Allocation and Execution of Real-Time Hardware Tasks onto Xilinx FPGAs Subject to Fault Occurrence
515
Key Indexes
Scopus
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