JOURNAL REPORT 2020
2018 | 2019 | 2020

International Journal of Reconfigurable Computing

0.63

Current CiteScore

0.63

Current CiteScore

Total articles submitted to this journal each month during 2020.
Total articles published in this journal each month during 2020.
6

Total authors

Total unique authors of published articles in this journal during 2020.
2

Total published articles

Total articles published in this journal during 2020.
132

Days

Average time from submission to acceptance

48

Days

Average time from acceptance to publication

15

Total submitted articles

Total articles submitted to this journal during 2020.
3

Total accepted articles

Total articles accepted for publication in this journal during 2020.

Most Viewed Articles

ArticleViews
Software-Defined Radio FPGA Cores: Building Towards a Domain-Specific Language1,303
A New High Performance Digital FM Modulator and Demodulator for Software Defined Radio and Its FPGA Implementation1,238
From FPGA to support cloud to cloud of FPGA : State of the art1,164
Operating System Concepts for Reconfigurable Computing: Review and Survey1,058
Exposing End-to-End Delay in Software-Defined Networking1,004
An FPGA-based quantum computing emulation framework based on serial-parallel architecture766
Design of FPGA-Based Accelerator for Convolutional Neural Network under Heterogeneous Computing Framework with OpenCL747
FPGA - Based implementation of all digital QPSK carrier recovery loop combining Costas loop and Maximum likelihood frequency estimator692
A Real-Time-Capable Dynamic Partial Reconfiguration System for an Application-Specific Soft-Core Processor679
Algorithm and Architecture Optimization for 2D Discrete Fourier Transforms with Simultaneous Edge Artifact Removal497

Most Viewed Special Issue Articles

ArticleViews
A FPGA-based hardware accelerator for CNNs using on-chip memories only: design and benchmarking with Intel Movidius Neural Compute Stick1,426
vMAGIC - Automatic Code Generation for VHDL628
THE COARSE-GRAINED/FINE-GRAINED LOGIC INTERFACE IN FPGAS WITH EMBEDDED FLOATING-POINT ARITHMETIC UNITS624
A Hardware Efficient Random Number Generator for Non-Uniform Distributions with Arbitrary Precision568
Implementation of Ring Oscillators Based Physical Unclonable Functions with Independent Bits in the Response506
Pipeline FFT Architectures Optimized for FPGAs466
FPGA Interconnect Topologies Exploration466
Design of a mathematical unit in FPGAs for the implementation of the control of a magnetic levitation system459
Dimension Reduction using Quantum Wavelet Transform on a High-Performance Reconfigurable Computer432
Runtime Scheduling, Allocation and Execution of Real-Time Hardware Tasks onto Xilinx FPGAs Subject to Fault Occurrence386

Key Indexes