JOURNAL REPORT 2021
2018 | 2019 | 2020 | 2021

International Journal of Reconfigurable Computing

0.63

Current CiteScore

0.63

Current CiteScore

Total articles submitted to this journal each month during 2021.
Total articles published in this journal each month during 2021.
2

Total authors

Total unique authors of published articles in this journal during 2021.
1

Total published articles

Total articles published in this journal during 2021.
N/A

Days

Average time from submission to acceptance

30

Days

Average time from acceptance to publication

21

Total submitted articles

Total articles submitted to this journal during 2021.
0

Total accepted articles

Total articles accepted for publication in this journal during 2021.

Most Viewed Articles

ArticleViews
Software-Defined Radio FPGA Cores: Building Towards a Domain-Specific Language1,381
Exposing End-to-End Delay in Software-Defined Networking1,357
Operating System Concepts for Reconfigurable Computing: Review and Survey1,282
A New High Performance Digital FM Modulator and Demodulator for Software Defined Radio and Its FPGA Implementation1,080
FPGA implementation of A* Algorithm for Real-time Path Planning989
From FPGA to support cloud to cloud of FPGA : State of the art825
FPGA-based Channel Coding Architectures for 5G Wireless using High-level Synthesis662
An FPGA-based quantum computing emulation framework based on serial-parallel architecture558
FPGA - Based implementation of all digital QPSK carrier recovery loop combining Costas loop and Maximum likelihood frequency estimator554
A Real-Time-Capable Dynamic Partial Reconfiguration System for an Application-Specific Soft-Core Processor485

Most Viewed Special Issue Articles

ArticleViews
A FPGA-based hardware accelerator for CNNs using on-chip memories only: design and benchmarking with Intel Movidius Neural Compute Stick784
vMAGIC - Automatic Code Generation for VHDL713
FPGA Interconnect Topologies Exploration560
Implementation of Ring Oscillators Based Physical Unclonable Functions with Independent Bits in the Response511
Pipeline FFT Architectures Optimized for FPGAs506
THE COARSE-GRAINED/FINE-GRAINED LOGIC INTERFACE IN FPGAS WITH EMBEDDED FLOATING-POINT ARITHMETIC UNITS497
Space-Based FPGA Radio Receiver Design, Debug, and Development of a Radiation Tolerant Computing System420
True-randomness and Pseudo-randomness in Ring Oscillator-based True Random Number Generators387
Design of a mathematical unit in FPGAs for the implementation of the control of a magnetic levitation system360
Dimension Reduction using Quantum Wavelet Transform on a High-Performance Reconfigurable Computer339

Key Indexes