JOURNAL REPORT 2021
2019 | 2020 | 2021 | 2022

International Journal of Reconfigurable Computing

0.63

Current CiteScore

0.63

Current CiteScore

Total articles submitted to this journal each month during 2021.
Total articles published in this journal each month during 2021.
5.0

Total authors

Total unique authors of published articles in this journal during 2021.
3

Total published articles

Total articles published in this journal during 2021.
150

Days

Average time from submission to acceptance

25

Days

Average time from acceptance to publication

37

Total submitted articles

Total articles submitted to this journal during 2021.
2

Total accepted articles

Total articles accepted for publication in this journal during 2021.

Most Viewed Articles

ArticleViews
Exposing End-to-End Delay in Software-Defined Networking2,771
Operating System Concepts for Reconfigurable Computing: Review and Survey2,501
FPGA implementation of A* Algorithm for Real-time Path Planning2,422
Software-Defined Radio FPGA Cores: Building Towards a Domain-Specific Language2,383
A New High Performance Digital FM Modulator and Demodulator for Software Defined Radio and Its FPGA Implementation2,064
From FPGA to support cloud to cloud of FPGA : State of the art1,741
FPGA-based Channel Coding Architectures for 5G Wireless using High-level Synthesis1,313
An FPGA-based quantum computing emulation framework based on serial-parallel architecture1,238
A Real-Time-Capable Dynamic Partial Reconfiguration System for an Application-Specific Soft-Core Processor1,161
FPGA - Based implementation of all digital QPSK carrier recovery loop combining Costas loop and Maximum likelihood frequency estimator1,090

Most Viewed Special Issue Articles

ArticleViews
A FPGA-based hardware accelerator for CNNs using on-chip memories only: design and benchmarking with Intel Movidius Neural Compute Stick1,718
A Hardware Efficient Random Number Generator for Non-Uniform Distributions with Arbitrary Precision1,630
vMAGIC - Automatic Code Generation for VHDL1,527
FPGA Interconnect Topologies Exploration1,480
THE COARSE-GRAINED/FINE-GRAINED LOGIC INTERFACE IN FPGAS WITH EMBEDDED FLOATING-POINT ARITHMETIC UNITS1,269
Pipeline FFT Architectures Optimized for FPGAs1,109
Implementation of Ring Oscillators Based Physical Unclonable Functions with Independent Bits in the Response994
Dimension Reduction using Quantum Wavelet Transform on a High-Performance Reconfigurable Computer856
True-randomness and Pseudo-randomness in Ring Oscillator-based True Random Number Generators795
Throughput Analysis for a High-Performance FPGA-Accelerated Real-time Search Application779

Key Indexes